Computing Leakage Current Distributions and Determination of Minimum Leakage Vectors for Combinational Designs
نویسندگان
چکیده
Computing Leakage Current Distributions and Determination of Minimum Leakage Vectors for Combinational Design. (May 2006) Kanupriya Gulati, B.E., University of Delhi Chair of Advisory Committee: Dr. Sunil Khatri Analyzing circuit leakage and minimizing leakage during the standby mode of operation of a circuit are important problems faced during contemporary circuit design. Analysis of the leakage profiles of an implementation would enable a designer to select between several implementations in a leakage optimal way. Once such an implementation is selected, minimizing leakage during standby operation (by finding the minimum leakage state over all input vector states) allows further power reductions. However, both these problems are NP-hard. Since leakage power is currently approaching about half the total circuit power, these two problems are of prime relevance. This thesis addresses these NP-hard problems. An Algebraic Decision Diagram (ADD) based approach to determine and implicitly represent the leakage value for all input vectors of a combinational circuit is presented. In its exact form, this technique can compute the leakage value of each input vector, by storing these leakage values implicitly in an ADD structure. To broaden the applicability of this technique, an approximate version of the algorithm is presented as well. The approximation is done by limiting the total number of discriminant nodes in any ADD. It is experimentally demonstrated that these approximate techniques produce results with quantifiable errors. In particular, it is shown that limiting the number of discriminants to a
منابع مشابه
A probabilistic method to determine the minimum leakage vector for combinational designs in the presence of random PVT variations
The control of leakage power consumption is a growing design challenge for current and future CMOS circuits. Among existing techniques, ’parking’ a circuit in a minimum leakage state during its standby mode of operation requires minimal circuit modification and results in significant leakage reduction. In this paper we present a heuristic approach (referred to as MLVC) to determine the input ve...
متن کاملLeakage Current Reduction in Sequential Circuits by Modifying the Scan Chains
Input vector control is an effective technique for reducing the leakage current of combinational VLSI circuits when these circuits are in the sleep mode. In this paper a design technique for applying the minimum leakage input to a sequential circuit is proposed. Our method uses the built-in scan-chain in a VLSI circuit to drive it with the minimum leakage vector when it enters the sleep mode. U...
متن کاملReordering of Test Vector Using Artificial Intelligence Approach for Power Reduction during VLSI Testing
Optimization of testing power is a major significant task to be carried out in digital circuit design. Low power VLSI circuits dissipate more power during testing when compared with that of normal operation. As the feature size is scaled down with process technology advancement, power minimization has become a serious problem for the designers as well as the test engineers. Test vector reorderi...
متن کاملOptimization Technique for FB/TB Assignment in PD-SOI Digital CMOS Circuits
This work presents a technique for reducing the total leakage current in PD-SOI combinational circuits by mixing floating-body and tied-body transistors in the same circuit. Basic gate characterization data are first presented, and then used as part of a static timing analysis based optimization algorithm. Results obtained from a number of benchmark circuits show a decrease of up to 86% in tota...
متن کاملPOWER AND TIMING MODELLING, OPTIMISATION AND SIMULATION Leakage current aware high-level estimation for VLSI circuits
The ever-growing leakage current of MOSFETs in nanometre technologies is the major concern to high performance and power efficient designs. Dynamic power management via powergating is effective to reduce leakage power, but it introduces power-up current that affects the circuit reliability. The authors present an in-depth study on high-level modelling of power-up current and leakage current in ...
متن کامل